-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 00:39:03 2024 UTC
-- File 20231024_214105_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T21:41:08.000.000.000 to 2023-10-24T21:41:08.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_214105_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  020E8990 0109CD50 038D2BF0 024BBE00 01B73080 00B65460 0376BF20 0066F050 02558870 037F4C40 02C0EA60
      02C0EA60 01A09F50 0370D0F0 02C8B880 03ACE4C0 027A96A0 0147DDF0 00F21980 00458AA0 02674FF0 0354E800
      0354E800 02FE9C00 0381D200 02413B00 0361A680 02D175C0 03B9CF20 006528B0 022BDE70 019F18A0 035094F0
      035094F0 02F8DE80 0384B1C0 0246E920 01659DB0 01D75360 033CFAD0 00A287B0 00F3C460 03451320 0073CD50
      0073CD50 024A2BF0 036F3E00 02D8A100 03B4F180 026E8940 0359CDE0 00F52B10 028FBE90 01C861D0 01962890
      01962890 03AE9E60 0079D150 024539F0 0367A500 02D47780 03BE4C40 02616A60 0151DF50 03F930F0 0205A880
      0205A880 0183BE60 03A130A0 0071A8F0 00497C80 006DC2C0 005B23A0 0276B270 034DEB40 02EB1EE0 019E9190
      019E9190 0351D950 007C9AF0 00216BC0 0031DE20 02293130 033DA9A0 00A37D70 00F2C3C0 008BA220 02CE7330
      02CE7330 03A94AA0 007DEFF0 00218C00 0018A500 0014F780 001E8C40 0011CA60 02192F50 0115B8F0 019F6480
      019F6480 0150D6C0 01F8BDA0
     
