-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 23:21:01 2024 UTC
-- File 20231024_141905_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T14:19:08.000.000.000 to 2023-10-24T14:19:08.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_141905_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0144CE20 03E6A930 0215FDA0 011F0370 00C84160 035630E0 027E9440 03A0EF30 027098A0 0148D4F0 01ECBE80
      01ECBE80 011AE1C0 01979120 035C59B0 02F27560 018B4FD0 034EE830 0374CE10 02675480 0354FEC0 02FE81A0
      02FE81A0 0181C170 014121C0 01E1B120 031169B0 0299DD60 01D533D0 033FAA30 03503F90 027C1020 01421830
      01421830 01E31420 03129E30 029BD120 01D639B0 013D2560 03A3B7D0 00726C30 004B5A20 01377B90 03D66320
      03D66320 003D52B0 0023FBE0 02320610 012B0510 03BE8790 0061C450 02512670 0379B540 02C56FE0 02D3EC00
      02D3EC00 01DD0D00 01338B80 01AA4E40 017F6960 03C0DDD0 0020B330 0030EAA0 02289FF0 033CD000 02A2B800
      02A2B800 01F9F200 00828580 00C3C740 00A224E0 02F33690 018AADD0 034FFB30 02E806A0 019C05F0 01520700
      01520700 01FB0480 00834360 03617160 00D1C9D0 02B92D30 03E5BBA0 00176670 001CD540 0012BFE0 021BE010
      021BE010 01161010 039D1810 0229CA00 019E9780 0151DC40 01F93260 0305AB50 00877EF0 00C4C180 00A6A140
      00A6A140 00F5F1E0 028F0910
     
