-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 22:37:35 2024 UTC
-- File 20231024_092534_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T09:25:37.000.000.000 to 2023-10-24T09:25:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_092534_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A03350 01F02AF0 01083F80 018C2040 014A3060 03EF2850 0018BC70 0014E240 001E9360 0211DAD0 011937B0
      011937B0 0195AC60 035F7A50 00F0C770 0088A4C0 00CCF6A0 015546F0 00FFF2C0 00800BA0 02C00E70 03A00940
      03A00940 02700DE0 01480B10 03EC0E90 001A09D0 02170D30 031C8BA0 00496730 0236EA50 012D9F70 01BB50C0
      01BB50C0 0166F8A0 03D584F0 023F4680 0320E5C0 02B09720 01E8DCB0 011CB2E0 03C975C0 0316E790 009D9450
      009D9450 02D35E70 03BAF140 026789E0 01544D10 03FE6B90 00015E50 0201F170 030109C0 0340C690 027052E0
      027052E0 01487B90 03EC4650 001A6570 001757C0 001CFC20 02128230 031BC320 009622B0 00DD33E0 0359D500
      0359D500 017A9FC0 01C7D020 03243830 02B62420 01ED3630 011BAD20 03967BB0 025D4660 0173E550 03CA17F0
      03CA17F0 01178E00 00CE2480 00A936C0 00FDADA0 02837B70 03C2C6C0 0223A5A0 01327770 01AB4CC0 017EEAA0
      017EEAA0 03C19FF0 0110A800 00CC7E00 00AA4100 00FF6180 0080D140 00C0B9E0 02A0E510 01F09790 0308DC50
      0308DC50 008CB270 00CAEB40
     
