-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 21:24:07 2024 UTC
-- File 20231024_065200_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T06:52:03.000.000.000 to 2023-10-24T06:52:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_065200_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00AA6EE0 02FF5990 0180F550 01A047F0 00B83200 00721580 00258FA0 02374870 032CEC40 02BA9A60 01E7D750
      01E7D750 03143CF0 029E2280 03D133C0 0239AA20 01257F30 02DBE050 00DB0830 00B68C20 02EDCA30 039B2F20
      039B2F20 0056B8B0 007DE4E0 02431690 01629DD0 03D3D330 023A3AA0 009393F0 006D2D00 005BBB80 00766640
      00766640 004D5560 026BFFD0 015E0030 01F10020 03098030 028D4020 01CBE030 02970810 02EE4600 03996500
      03996500 0255D780 037F3C40 02C0A260 01A0F350 03708AF0 02C8CF80 03ACA840 027AFC60 02A3C120 00F910D0
      00F910D0 028598B0 03C754E0 0024FE90 023681D0 012DC130 01BB21A0 0366B170 02D5E9C0 03BF1D20 003049D0
      003049D0 01143690 039E2DD0 00513B30 0079A6A0 024575F0 0367CF00 02D42880 03BE3CC0 026122A0 0151B3F0
      0151B3F0 00FCB500 004177C0 0061CC20 02512A30 0379BF20 00C560B0 00A7D0E0 02F43890 018E24D0 034936B0
      034936B0 02EDADE0 02CDBD80 01D5B1A0 033F6970 02A0DDC0 03F0B320 0008EAB0 000C9FE0 020AD010 010FB810
      010FB810 03886410 004C5610
     
