-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 19:58:54 2024 UTC
-- File 20231024_044150_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T04:41:53.000.000.000 to 2023-10-24T04:41:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_044150_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0354EBB0 02FE9E60 0181D150 034139F0 02E1A500 03917780 0259CC40 03752A60 00CFBF50 02A860F0 03FC5080
      03FC5080 01013C60 03C0D120 0020B9B0 0030E560 022897D0 013CDC30 01A2B220 0373EB30 02CA1EA0 01AF11F0
      01AF11F0 01789900 00E26AC0 0249AFD0 016D7830 01DBC420 03362630 02AD3520 01FBAFB0 01067860 03854450
      03854450 0047E670 00641540 022B0FF0 019F4400 0150E600 01F89500 0104DF80 0186B040 0145E860 03E71C50
      03E71C50 00149270 001EDB40 0011B6E0 030CB6C0 034576D0 00E7CDB0 00942B60 02DE3ED0 01B121B0 0169B160
      0169B160 03DD69D0 0033DD30 002A33A0 023F2A70 01905FA0 01AC3830 017A2420 03C73630 0224AD20 0136FBB0
      0136FBB0 01AD8660 037B4550 00C6E7F0 00A59400 00F75E00 00467880 0032A260 022BF350 013E0AF0 01A10F80
      01A10F80 01718840 01C94C60 032DEA50 00BB1F70 00E690C0 0095D8A0 016F9A70 00EC2BA0 029A3E70 03D72140
      03D72140 023CB1E0 0122E910 03B39D90 006A5350 025F7AF0 0370C780 02C8A440 03D67B30 031EA350 0091F2F0
      0091F2F0 00D90B80 00B58E40
     
