-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 18:26:50 2024 UTC
-- File 20231024_021102_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-24T02:11:05.000.000.000 to 2023-10-24T02:11:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231024_021102_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C7B2F0 00A46B80 00F65E40 008D7160 02CBC9D0 01AE2D30 01793BA0 03C5A670 02277540 0334CFE0 00AEA810
      00AEA810 02F9FC10 01850210 03478310 00E44290 029663D0 00EEA910 034CFEC0 02EA81A0 019FC170 015021C0
      015021C0 01F83120 030429B0 02863D60 01C523D0 0327B230 02B46B20 00F72F50 01465C70 01E57240 0117CB60
      0117CB60 039C2ED0 005239B0 007B2560 0246B7D0 0165EC30 01D71A20 033C9730 03516E50 007CECB0 00429AE0
      00429AE0 0263D790 01523C50 03FB2270 0206B340 0305EAE0 00871F90 02C49050 01A6D870 00BADA20 0173DB90
      0173DB90 03CA3650 002F2D70 0038BBC0 0024E620 02369530 032DDFA0 00BB3070 00E6A840 0095FC60 036F8120
      036F8120 006C20D0 025A30B0 037728E0 00CCBC90 02AAE2D0 01FF93B0 01005A60 03807750 00404CF0 00606A80
      00606A80 00282FE0 031E1C00 02911200 03D99B00 02355680 032FFDC0 02B80320 01E402B0 011603E0 039D0210
      039D0210 00538310 033D2140 0351D8F0 02F93480 0385AEC0 024779A0 0164C570 01D6A7C0 013DF420 03A30E30
      03A30E30 02728920 014BCDB0
     
