-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 30 00:24:44 2024 UTC
-- File 20231022_111328_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-22T11:13:31.000.000.000 to 2023-10-22T11:13:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231022_111328_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C8A330 012CF2A0 03BA8BF0 0267CE00 03542900 02FE3D80 03812340 0320D970 01585AE0 03F47790 000E4C50
      000E4C50 02096A70 030DDF40 028B30E0 01CEA890 0329FCD0 00BD02B0 00E383E0 03492100 0176D8C0 01CDB4A0
      01CDB4A0 032B6EF0 02BED980 03E1B540 02116FE0 0119D810 03953410 005FAE10 02707910 02A422C0 03FB19D0
      03FB19D0 00069530 0005DFA0 02073070 0304A840 0286FC60 01C58250 03274370 02B4E2C0 03EE93A0 000CED30
      000CED30 02054DD0 0107EB30 01841EA0 034611F0 02E51900 03979580 025C5F40 037270E0 00CB4890 02AEECD0
      02AEECD0 00FCCD50 014155F0 01E1FF00 01110080 019980C0 015540A0 03FFE0F0 02001080 030018C0 028014A0
      028014A0 01C01EF0 009008C0 026C0650 015A0570 01F707C0 010C8420 038AC630 024FA520 016877B0 01DC4C60
      01DC4C60 03326A50 00AB5F70 007F7860 03206220 00B05330 00E87AA0 029C47F0 03D26400 023B5600 0326FD00
      0326FD00 02B58380 03EF4240 0218E360 028A4960 02E7B6E0 01946D90 035E5B50 00F176F0 0089CD80 00CD2B40
      00CD2B40 00ABBEE0 02FE6190
     
