-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jan 29 19:41:14 2024 UTC
-- File 20231021_194348_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-21T19:43:51.000.000.000 to 2023-10-21T19:43:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231021_194348_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005A5940 007775E0 024CCF10 016AA890 03EFFE60 020C00A0 010A00F0 018F0080 014880C0 01ECC0A0 031AA0F0
      031AA0F0 0297F080 03DC08C0 02320CA0 012B0AF0 00DF47C0 02587210 01744B10 03CE6E90 002959D0 023DF530
      023DF530 03230FA0 00B28870 00EBCC40 009E2A60 02D13F50 00DCD070 00595C20 0275F230 034F0B20 00E88EB0
      00E88EB0 009CC9E0 02D2AD10 01BBFB90 03660650 00D50570 00BF87C0 02702210 02A41980 03F61540 020D1FE0
      020D1FE0 010B9010 038E5810 00497410 026DCE10 015B2910 03F6BD90 000DE350 01058970 00C3A6E0 02A27590
      02A27590 01F34F50 030AE8F0 028F9C80 03C852C0 022C7BA0 013A4670 01A76540 0174D7E0 03E75E00 010A7880
      010A7880 018F44C0 0148E6A0 03EC95F0 021ADF00 0317B080 029C68C0 03D25CA0 003B72F0 0026CB80 001AD720
      001AD720 010BDE50 038E3170 024929C0 036DBD20 00DB63B0 00B6D260 02EDBB50 019B66F0 0156D580 01FDBF40
      01FDBF40 0281B070 01E0B420 0310EE30 02989920 01D4D5B0 013EBF60 03A1E0D0 007110B0 004998E0 026D5490
      026D5490 015BFED0 01FB00D0
     
