-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jan 29 16:32:17 2024 UTC
-- File 20231021_122715_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-21T12:27:18.000.000.000 to 2023-10-21T12:27:18.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231021_122715_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03F938C0 0205A4A0 0083BB70 00613360 0251AAD0 01797FB0 01C5C060 03272050 00B4B070 00EEE840 00999C60
      00999C60 02D55250 01BFFB70 00B00360 03740160 00CE01D0 02A90130 03FD81A0 00034170 0002E1C0 00039120
      00039120 020259B0 03037560 0082CFD0 0161D410 03E89F00 021CD080 0312B8C0 029BE4A0 01D616F0 013D1D80
      013D1D80 01A39340 01725AE0 03CB7790 002ECC50 011CD530 02C95FD0 01ADF030 017B0820 03C68C30 0225CA20
      0225CA20 01372F30 01ACB8A0 037AE4F0 02C79680 03A45DC0 033B3990 025352A0 017AFBF0 01C78600 01244500
      01244500 01B66780 016D5440 01DBFE60 03360150 00AD01F0 00FB8100 004320C0 02315850 0129F470 01BD0E40
      01BD0E40 01638960 03D24DD0 003B6B30 0026DEA0 0235B1F0 032F6900 02B8DD80 01F259A0 0185BAB0 014767E0
      014767E0 03E4D410 0016BE10 021DE110 01131190 039A9950 0057D5F0 007C3F00 00422080 00319860 0314AA20
      0314AA20 009EFF30 00D180A0 02B940F0 03E5E080 021710C0 031C98A0 0092D4F0 00DBBE80 00B661C0 0276A890
      0276A890 02A6FE60 01F58150
     
