-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jan 29 01:05:02 2024 UTC
-- File 20231019_015041_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-19T01:50:44.000.000.000 to 2023-10-19T01:50:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231019_015041_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029F6050 01D0D070 0138B840 01A4E460 03769650 0066EEB0 022ACCF0 019FD540 01503FE0 03F82010 00043010
      00043010 02062810 01053C10 0387A210 00447310 02664A90 01556FD0 01FFEC10 03800D00 02400B80 03600E40
      03600E40 02D00960 01B80DD0 03640B30 02D60EA0 01BD09F0 01638D00 01D24B80 009DB720 0169B650 03DD6D70
      03DD6D70 0233DBC0 032A3620 00BF2D30 00E0BBA0 0290E670 03D89540 0234DFE0 012EB010 03DCF400 01194700
      01194700 0195E480 015F16C0 01F09DA0 0308D370 028CBAC0 03CAE7A0 002F9470 00385E40 00247160 031B24E0
      031B24E0 024B5B40 036EF6E0 00D98D90 02B54B50 01EFEEF0 01181980 01941540 015E1FE0 03F11010 00099810
      00099810 0306AA00 0142FF80 01E38040 01124060 039B6050 0056D070 007DB840 00436460 0262D650 0153BD70
      0153BD70 01FA63C0 0283A910 02E13EC0 0391A1A0 00597170 0075C9C0 004F2D20 0268BBB0 035CE660 00F29550
      00F29550 028BDFF0 03CE3000 01149400 00CF6F00 00A8D880 00FCB4C0 0082EEA0 02C399F0 03A25500 02737F80
      02737F80 034AC040 02EFA060
     
