-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Jan 28 22:40:46 2024 UTC
-- File 20231018_155325_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-18T15:53:28.000.000.000 to 2023-10-18T15:53:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231018_155325_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  016C3140 01DA29E0 03373D10 00ACA390 02FAF250 01878B70 00A22760 02F334D0 018AAEB0 014FF9E0 03E80510
      03E80510 001C0790 02120450 011B0670 01968540 015DC7E0 03F99200 0102AD80 0183FB40 014206E0 03E30590
      03E30590 00128750 021BC4F0 03162680 029D35C0 03D3AF20 003A78B0 0213A270 018D39A0 034BA570 02EE77C0
      02EE77C0 03994C20 0055EA30 007F1F20 024090B0 0360D8E0 00D0B490 02B8EED0 00F24CD0 0145B550 03E76FF0
      03E76FF0 0214D800 031EB400 0291EE00 03D91900 02359580 032F5F40 02B8F0E0 01E48890 038B6660 02276AA0
      02276AA0 0134DFF0 01AEB000 0179E800 01C51C00 01279200 01B45B00 016E7680 01D94DC0 0135EB20 01D78F50
      01D78F50 019E2470 01513640 01F9AD60 03057BD0 0087C630 00C42520 02A637B0 03F52C60 000FBA50 02086770
      02086770 01862A60 03A29FA0 0073D070 004A3840 006F2460 0258B650 0174ED70 01CE9BC0 0129D620 03BD3D30
      03BD3D30 0263A3A0 00A93930 027ED2D0 0141BBB0 01E16660 0311D550 00993FF0 00D5A000 00BF7000 00E0C800
      00E0C800 0090AC00 00D8FA00
     
