-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Jan 28 21:01:48 2024 UTC
-- File 20231018_121142_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-18T12:11:45.000.000.000 to 2023-10-18T12:11:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231018_121142_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01B56F10 03B7EC40 03360D30 035685D0 00FDC730 008324A0 02C2B6F0 03A3ED80 02721B40 034B16E0 00EE9D90
      00EE9D90 0299D350 01D53AF0 009FD3C0 02681D10 015C1390 03F21A50 000B1770 000E9CC0 0009D2A0 020D3BF0
      020D3BF0 030BA600 028E7500 03C94F80 0116F420 01CEC710 0329A490 00BD76D0 02E3CDB0 03922B60 005B3ED0
      005B3ED0 0276A1B0 034DF160 00EB09D0 029E8D30 03E8E5D0 000E4B90 02096E50 010DD970 018B35C0 014EAF20
      014EAF20 03E9F8B0 021D04E0 01138690 039A45D0 00576730 023E6A50 0090AFB0 00D8F860 02B48450 01EEC670
      01EEC670 0119A540 019577E0 035FCC10 00F02A10 02883F10 01CC2090 03951860 022FCA20 01382F30 01A438A0
      01A438A0 037624F0 02CD3680 03ABADC0 027E7B20 014146B0 01E1E5E0 03111710 024CCE40 03B554B0 026FFEE0
      026FFEE0 01580190 03F40150 000E01F0 00090100 000D8180 000B4140 000EE1E0 02099110 0286ACC0 03E2FD50
      03E2FD50 001383F0 001A4200 00176300 001CD280 0012BBC0 001BE620 02161530 031D1FA0 00939070 006D2C20
      006D2C20 012DDD10 03BB3390
     
