-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Jan 28 19:26:28 2024 UTC
-- File 20231018_073025_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-18T07:30:28.000.000.000 to 2023-10-18T07:30:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231018_073025_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037D4CD0 00C3EAB0 00A21FE0 02F31010 02C54C00 03A7EA00 02741F00 034E1080 02E918C0 039D94A0 00535EF0
      00535EF0 007AF180 00478940 00644DE0 032B3580 015F57A0 03F0FC70 02088240 030CC360 008AA2D0 02CFF3B0
      02CFF3B0 03A80A60 007C0F50 024208F0 03630C80 01694560 03EEF3E0 00198A10 02154F10 011FE890 03901CD0
      03901CD0 005812B0 00741BE0 024E1610 01691D10 03DD9390 0219AD20 008ABDD0 02CFE330 03A812A0 007C1BF0
      007C1BF0 00421600 00631D00 00529380 007BDA40 00463760 02652CD0 00ABDD50 017F19F0 01C09500 0120DF80
      0120DF80 01B0B040 0168E860 03DC9C50 0032D270 002BBB40 003E66E0 02215590 0298FFA0 00EA4030 009F6020
      009F6020 02D0D030 03B8B820 0064E430 00569620 027DDD30 034333A0 00E2AA70 0093FF40 026D0070 01ADC020
      01ADC020 037B2030 02C6B020 01A5E830 01771C20 03CC9230 022ADB20 013FB6B0 01A06DE0 03705B10 02643B40
      02643B40 03AB1370 027E9AC0 0341D7A0 00E13C70 0091A240 00D97360 02B5CAD0 01EF2FB0 0118B860 0394E450
      0394E450 002F4B30 021C7750
     
