-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Jan 28 18:06:08 2024 UTC
-- File 20231018_032835_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-18T03:28:38.000.000.000 to 2023-10-18T03:28:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231018_032835_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  011A9CB0 02CBE970 01D70EE0 033C8990 00A2CD50 02F3ABF0 038A7E00 024F4100 0368E180 02DC9140 03B2D9E0
      03B2D9E0 006BB510 032F37C0 035C5610 00F27D10 028B4390 01CEE250 03299370 02BD5AC0 03E3F7A0 00120C70
      00120C70 001B0A40 00168F60 030EE460 0244CB20 0166AEB0 01D5F9E0 033F0510 00A08790 02F0C450 0188A670
      0188A670 014CF540 01EA8FE0 031FC810 02481600 01B60E80 016D09C0 01DB8D20 03364BB0 02AD6E60 01FBD950
      01FBD950 030635F0 02852F00 03C7B880 022464C0 039B2B50 002B5F70 003EF0C0 002188A0 02314CF0 0329EA80
      0329EA80 02BD1FC0 03E39020 00125830 001B7420 0216CE30 038ED490 0224DF60 0136B0D0 03ADE8B0 027B1CE0
      027B1CE0 01469290 03E5DBD0 00173630 001CAD20 0212FBB0 031B8660 024B22A0 00B759F0 00ECF500 009A8F80
      009A8F80 00D7C840 00BC2C60 02E23A50 01932770 015AB4C0 01F7EEA0 030C19F0 01450A80 00F3C7E0 028A2410
      028A2410 01CF3610 0328AD10 00BCFB90 02E28650 0193C570 015A27C0 01F73420 030CAE30 03457C90 0273E160
      0273E160 014A11D0 03EF1930
     
