-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 17:29:13 2024 UTC
-- File 20231015_182342_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-15T18:23:45.000.000.000 to 2023-10-15T18:23:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231015_182342_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  034DF2A0 007585F0 0027A380 001A3920 021725B0 031CB760 0092ECD0 02DB9AB0 03B657E0 006D7C10 025BC210
      025BC210 01762310 03CD3290 0215D5E0 028F9F80 03C85040 022C7860 013A4450 03A76670 0274D540 034EBFE0
      034EBFE0 00E9E010 029D1010 01D39810 039D2A00 0129DF80 01BD3040 0163A860 03D27C50 003B4270 0026E340
      0026E340 003592E0 022F5B90 0138F650 03A48D70 013B65E0 03D36B80 023ADE40 0327B160 00B469D0 02EE5D30
      02EE5D30 039973A0 0055CA70 007F2F40 0040B8E0 0260E490 02A84B60 02FE3760 01812CD0 0341BAB0 02E167E0
      02E167E0 0191D410 03593E10 00F5A110 028F7190 01C8C950 032CADF0 015D7D80 00F9E1A0 02851170 03C799C0
      03C799C0 02245520 01367FB0 01AD4060 037BE050 00C61070 00A51840 00F79460 03462F20 00729C50 024BD270
      024BD270 036E3B40 02D926E0 01B5B590 036F6F50 00D8D8F0 00B4B480 00EEEEC0 009999A0 016AAAB0 02EFFFF0
      02EFFFF0 03980000 02540000 037E0000 02C10000 03A18000 02714000 0349E000 02ED1000 039B9800 012B2A00
      012B2A00 00DF5F80 00B0F040
     
