-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 17:23:18 2024 UTC
-- File 20231015_181436_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-15T18:14:39.000.000.000 to 2023-10-15T18:14:39.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231015_181436_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00E0A800 00487E00 00362080 00169860 030EEA20 00899F30 00CD50A0 02ABF8F0 03FE0480 020106C0 030185A0
      030185A0 00814770 00C1E4C0 00A116A0 0178CEF0 00E254C0 00937EA0 02DAC1F0 03B7A100 026C7180 035A4940
      035A4940 02F76DE0 018CDB10 034AB690 00EFEDD0 014C0D90 03F505A0 000F8770 000844C0 000C66A0 020A55F0
      020A55F0 030F7F00 0288C080 03CCA0C0 022AF0A0 013F88F0 00D02640 025C1AB0 037217E0 00CB1C10 02AE9210
      02AE9210 01F9DB10 03053690 0087ADD0 02C47B30 03A646A0 007565F0 0027EB80 001A0F20 021708B0 031C8CE0
      031C8CE0 0092CA90 02DBAFD0 01B67830 016D4420 03DBE630 02361520 012D1FB0 02DDC830 03D99610 00355D10
      00355D10 022FF390 01380A50 03A40F70 027608C0 034D0CA0 00EB8AF0 009E4F80 00D16840 025CEE30 03B94C90
      03B94C90 0065EAD0 02571FB0 037C9060 00C2D850 02A3B470 03F26E40 020B5960 010EF5D0 03898F30 0326A450
      0326A450 005AFB30 007786A0 024C45F0 036A6700 02DF5480 03B0FEC0 026881A0 015CC170 01F2A1C0 010BF120
      010BF120 01C704D0 01924350
     
