-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 13:37:13 2024 UTC
-- File 20231014_202327_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-14T20:23:30.000.000.000 to 2023-10-14T20:23:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231014_202327_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037030A0 00C828F0 00AC3C80 00FA22C0 008733A0 02C4AA70 03A6FF40 027580E0 02A7A040 03F47060 000E4850
      000E4850 02096C70 030DDA40 028B3760 01CEACD0 0329FAB0 02BD07E0 01E38410 03892300 0126D940 01B5B5E0
      01B5B5E0 036F6F10 00D8D890 02B4B4D0 01EEEEB0 011999E0 03955510 005FFF90 02700050 00A40030 027B0010
      027B0010 01468010 03E5C010 00172010 021CB010 0112E810 039B9C10 00565210 027D7B10 0143C690 03F112E0
      03F112E0 0204CDC0 0306AB20 0085FEB0 00C701E0 02A48110 01F6C190 030DA150 008B71F0 00CEC900 00A9AD80
      00A9AD80 007EBDA0 0120F1B0 01B08960 0368CDD0 00DCAB30 00B2FEA0 02EB81F0 039E4100 02516180 0379D140
      0379D140 02C539E0 02D3D280 01DD1DE0 03339310 00AA5A90 02FF77D0 0180CC30 0140AA20 03E0FF30 021080A0
      021080A0 0118C0F0 0194A080 00AF7860 037C6220 00C25330 00A37AA0 02F2C7F0 038BA400 024E7600 03694D00
      03694D00 02DDEB80 03B31E40 026A9160 02AFECE0 02FC0D40 03820BE0 00430E10 02628910 0153CD90 03FA2B50
      03FA2B50 00073EF0 0004A180
     
