-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 11:59:33 2024 UTC
-- File 20231014_170826_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-14T17:08:29.000.000.000 to 2023-10-14T17:08:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231014_170826_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00E9DE20 029D3130 03D3A9A0 003A7D70 002743C0 0034E220 022E9330 0339DAA0 00529BF0 007BD600 00463D00
      00463D00 00652380 0057B240 007C6B60 02425ED0 016371B0 01D2C960 033BADD0 00533D90 033D51A0 00A3F970
      00A3F970 00F205C0 008B0720 02CE84B0 03A9C6E0 007D2590 0243B750 01626CF0 01D35A80 009D7BE0 0369E300
      0369E300 02DD1280 03B39BC0 026A5620 015F7D30 01F0C3A0 0308A270 028CF340 03CA8AE0 002FCF90 031C1420
      031C1420 00490F10 026D8890 015B4CD0 03F6EAB0 020D9FE0 010B5010 038EF810 00498410 026D4610 015BE510
      015BE510 03FB0BC0 03034710 0082E490 02C396D0 01A25DB0 01737360 03CACAD0 002FAFB0 00387860 02244450
      02244450 01366670 00D6AAA0 015EFFF0 01F18000 01094000 018DE000 014B1000 01EE9800 0119D400 01953E00
      01953E00 015FA100 01F07180 008424A0 01631B70 01D296C0 013BDDA0 03A63370 02752AC0 034FBFA0 00E86070
      00E86070 009C5040 00D27860 02BB4450 00F37330 02456550 0167D7F0 01D43C00 013E2200 01A13300 0171AA80
      0171AA80 01C97FC0 012DC020
     
