-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 11:15:41 2024 UTC
-- File 20231014_154751_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-14T15:47:54.000.000.000 to 2023-10-14T15:47:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231014_154751_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  034AB1D0 00EFE930 00981DA0 016A09B0 02EF86B0 03CC22F0 011519C0 02CFCA90 01A82FD0 037C3830 02C22420
      02C22420 01A33630 0172AD20 03CBFBB0 022E0660 01390550 03A587F0 013BA200 00D33980 00BAA540 00E7F7E0
      00E7F7E0 02940C10 01DE0A10 03310F10 00A98890 02FD4CD0 0183EAB0 01421FE0 03F18800 0104A600 0186F500
      0186F500 01458F80 01E74840 0114EC60 039E9A50 0051D770 00793CC0 0045A2A0 026773F0 01AA6500 00BFABC0
      00BFABC0 00E07E20 02904130 03D861A0 00345170 002E79C0 00394520 0225E7B0 03371460 00AC9E50 017D68B0
      017D68B0 02E1EE70 03911940 025995E0 01755F10 03CFF090 002808D0 023C0CB0 03220AE0 00B30F90 02EA8850
      02EA8850 00CFE630 02540A90 017E0FD0 03C10830 02218C20 01314A30 01A9EF20 037D18B0 02C394E0 01A25E90
      01A25E90 037371D0 00656490 032BEB60 00BE1ED0 02E111B0 03919960 005955D0 0275FF30 034F00A0 00E880F0
      00E880F0 009CC080 00D2A0C0 025DF850 00B98230 00E54320 0297E2B0 03DC13E0 00321A10 022B1710 013E9C90
      013E9C90 03A1D2D0 00713BB0
     
