-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 20 22:37:04 2024 UTC
-- File 20231002_143051_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-02T14:30:54.000.000.000 to 2023-10-02T14:30:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231002_143051_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03E35BA0 0012F670 001B8D40 00164BE0 021D6E10 0113D910 039A3590 022B97A0 009F2E30 02685C90 02AE3960
      02AE3960 02FC92E0 0182DB90 0343B650 00E26D70 00935BC0 00DAF620 02B78D30 03EC4BA0 001A6E70 00175940
      00175940 020E7AF0 0184A3C0 0146F220 03E58B30 02174EA0 011CE9F0 01929D00 015BD380 01F63A40 010D2760
      010D2760 038BB4D0 00273750 011A5670 01977D40 015CC3E0 03F2A210 000BF310 020E0A90 01090FD0 038D8830
      038D8830 024B4C20 016EEA30 02ECCF90 02CD5420 01ABFE30 017E0120 03C101B0 02218160 013141D0 03A9E130
      03A9E130 027D11A0 01439970 01E255C0 0289BF90 02E6B020 0195E830 015F1C20 03F09230 0208DB20 010CB6B0
      010CB6B0 018AEDE0 034F9B10 00E85690 029C7DD0 00E92190 034ED8A0 00E9B4F0 009D6E80 00D3D9C0 00BA3520
      00BA3520 02E72FB0 0394B860 005EE450 02719670 03495D40 0376F9F0 0166C280 01D5A3C0 013F7220 03A0CB30
      03A0CB30 0270AEA0 0148F9F0 01EC8500 011AC780 0197A440 015C7660 03F926A0 0002DAF0 0003B780 00026C40
      00026C40 00035A60 0202F750
     
