-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 20 22:22:53 2024 UTC
-- File 20231002_134820_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-02T13:48:23.000.000.000 to 2023-10-02T13:48:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231002_134820_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  036A4A40 02DF6F60 01B0D8D0 0368B4B0 02DCEEE0 01B29990 036BD550 00DE3FF0 00B12000 00E9B000 009D6800
      009D6800 0069EE00 002E8C80 0039CAC0 00252FA0 0237B870 032C6440 02BA5660 01E77D50 0314C3F0 029EA200
      029EA200 03D1F300 011C8540 02C963F0 03ADD200 027B3B00 0346A680 02E5F5C0 03970F20 005C88B0 0072CCE0
      0072CCE0 024BAA90 016E7FD0 01ECA010 038D7800 024BC400 036E2600 02D93500 03B5AF80 026F7840 0358C460
      0358C460 00F4A650 028EF570 03C98FC0 0316A410 024EFB00 03698680 02DD45C0 03B3E720 006A14B0 005F1EE0
      005F1EE0 02709190 0148D950 03ECB5F0 021AEF00 018BCC40 02A71530 03F49FA0 000ED070 0009B840 000D6460
      000D6460 020BD650 010E3D70 018923C0 014DB220 03EB6B30 030F6F50 00446C70 00665A40 00557760 027FCCD0
      027FCCD0 01402AB0 01E03FE0 03102010 00983010 02D42810 01BE3C10 03B09100 01346CC0 01AE5AA0 037977F0
      037977F0 02C5CC00 03A72A00 0274BF00 034EE080 02E990C0 039D58A0 0053F4F0 003D0740 0211C270 03192340
      03192340 0295B2E0 01DF6B90
     
