-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 20 21:47:47 2024 UTC
-- File 20231002_124922_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-02T12:49:25.000.000.000 to 2023-10-02T12:49:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231002_124922_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  030C3F40 028A20E0 01CF3090 0328A8D0 00BCFCB0 00E282E0 0293C390 01DA2250 03373370 02ACAAC0 03FAFFA0
      03FAFFA0 00078070 00044040 00066060 0302A820 0041FE10 02610110 01518190 03F94150 0005E1F0 00071100
      00071100 00049980 0006D540 0005BFE0 02076010 02826800 01E1AE00 01117900 0199C580 01552740 01FFB4E0
      01FFB4E0 03006E90 008059D0 02C07530 03A04FA0 00706870 00242E20 011B1C90 039692D0 005DDBB0 00733660
      00733660 024AAD50 016FFBF0 01D80600 01340500 01AE0780 01790440 02E2C330 03C9D150 002D39F0 003BA500
      003BA500 00267780 00354C40 002FEA60 02381F50 012410F0 01B61880 016D14C0 02EDCF50 00CD9470 00AB5E40
      00AB5E40 00FEF160 028189D0 01C14D30 0121EBA0 03B11E70 02699140 035D59E0 00F3F510 034507C0 0373C210
      0373C210 00CA2310 02AF3290 01F8ABD0 0304FE30 02868120 01C5C1B0 01272160 03B4B1D0 006EE930 022CCED0
      022CCED0 009D54D0 02D3FEB0 03BA01E0 00670110 02548190 017EC150 03C1A1F0 02217100 0331C980 02A92D40
      02A92D40 03FEDDF0 0100D980
     
