-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 20 21:16:42 2024 UTC
-- File 20231002_120716_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-02T12:07:19.000.000.000 to 2023-10-02T12:07:19.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231002_120716_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01EAAA50 031FFF70 029000C0 03D800A0 003400F0 002E0080 003900C0 002580A0 011BA070 00CB3820 02AEA430
      02AEA430 03F9F620 00050D30 00078BA0 02044E70 03066940 02855DE0 01C7F310 03240A90 025B07E0 02BB4200
      02BB4200 03E6E300 02159280 031F5BC0 0290F620 01D88D30 0134CBA0 03AEAE70 0279F940 034505E0 0273C380
      0273C380 01A51120 037799B0 02CC5560 01AA7FD0 037F4030 02C0E020 01A09030 0170D820 03C8B430 022CEE20
      022CEE20 009D4C90 0369F560 00DD0FD0 02B38830 03EA4C20 001F6A30 0010DF20 0218B0B0 0314E8E0 009E9C90
      009E9C90 02D1D2D0 00DC9DD0 01596990 03F5DD50 000F33F0 0008AA00 000CFF00 000A8080 000FC0C0 000820A0
      000820A0 020C30F0 030A2880 01479E60 03F228A0 000B3CF0 000EA280 0009F3C0 000D0A20 020B8F30 030E48A0
      030E48A0 00896CF0 00CDDA80 00AB37C0 027F5610 02A07E80 03F041C0 02086120 010C51B0 018A7960 034F45D0
      034F45D0 00E8E730 009C94A0 02D2DEF0 03BBB180 013334A0 01D55770 013FFCC0 01A002A0 037003F0 02C80200
      02C80200 03AC0300 027A0280
     
