-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 12 03:13:19 2024 UTC
-- File 20230725_012550_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-25T01:25:53.000.000.000 to 2023-07-25T01:25:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230725_012550_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02BA04C0 03E706A0 001485F0 001EC700 0011A480 001976C0 0015CDA0 021F2B70 0310BEC0 0298E1A0 01D49170
      01D49170 009F6CE0 03686D40 02DC5BE0 01B27610 036B4D10 00DEEB90 02B19E50 01E95170 011DF9C0 01930520
      01930520 035A87B0 037BE230 03630990 00D28D50 02BBCBF0 03E62E00 02153900 031FA580 02907740 03D84CE0
      03D84CE0 00346A90 022E5FD0 009CB810 03697200 02DDCB00 03B32E80 026AB9C0 035FE520 00F017B0 00881C60
      00881C60 02CC1250 01AA1B70 017F16C0 02E04ED0 00C834D0 02AC2EB0 03FA39E0 00072510 0204B790 0106EC50
      0106EC50 03859A70 02475740 0364FCE0 00D68290 035EE1E0 0278C880 0344ACC0 02E6FAA0 019587F0 015F4400
      015F4400 01F0E600 01089500 018CDF80 014AB040 01EFE860 038C0E20 00250490 023786D0 012C45B0 01BA6760
      01BA6760 036754D0 00D4FEB0 00BE81E0 02E1C110 01912190 0359B150 007AB4F0 0023F740 00320CE0 022B0A90
      022B0A90 013E8FD0 03A1C830 02712C20 0149BA30 01ED6720 031BD4B0 02963EE0 02EE90C0 03CCEC50 002A9A70
      002A9A70 003FD740 00203CE0
     
