-- ERROR --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 12 00:38:59 2024 UTC
-- File 20230724_065914_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-24T06:59:21.000.000.000 to 2023-07-24T06:59:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.4637340 to 0.4637340
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      FF -> 136.9 degC in 1 packets (all packets)
Temperature ant 3: 
      1F -> 27.9 degC in 1 packets (all packets)
Temperature ant 4: 
      EF -> -957.8 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      1 in 1 packets (all packets)
      -> ERROR
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230724_065914_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): ERROR
Configuration check: completeness of CONFHFA (19 bytes)    : ERROR
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 0
Configuration check: number of HFPE/RW intervals (max. 20) : 0

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00F87F50 028440F0 03C66080 022550C0 0337F8A0 00AC04F0 00FA0680 008705C0 02624390 02A9B120 00FEB4D0
      00FEB4D0 0140F750 03E08CF0 0210CA80 0318AFC0 0294F820 01DE8430 0131C620 03A92530 027DB7A0 01436C70
      01436C70 00F16D20 0144EDD0 03E69B30 0215D6A0 011F3DF0 0190A300 0158F280 01F48BC0 010ECE20 0389A930
      0389A930 024D7DA0 00B5E1B0 027788B0 034C4CE0 00EA6A90 029F5FD0 01D0F030 01388820 03A4CC30 0276AA20
      0276AA20 014DFF30 01EB00A0 018F4070 00A47020 02F64830 038D6C20 004BDA30 006E3720 02592CB0 0375BAE0
      0375BAE0 00CF6790 02A8D450 01FCBE70 008170A0 0160E470 01D09640 0138DD60 03A4B3D0 0076EA30 004D9F20
      004D9F20 026B50B0 035EF8E0 00F18490 028946D0 00E6F2D0 014AC5D0 03EFA730 021874A0 01144EF0 019E6980
      019E6980 01515D40 01F9F3E0 03050A10 00878F10 02C44890 02D33660 02DD56A0 01B3FDF0 016A0300 01DF0280
      01DF0280 013083C0 01A8C220 037CA330 02C2F2A0 01A38BF0 01724E00 00E5B480 004BB760 026E6CD0 01595AB0
      01595AB0 01F5F7E0 030F0C10
     
