-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jan  8 16:11:29 2024 UTC
-- File 20230721_140624_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-21T14:06:27.000.000.000 to 2023-07-21T14:06:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230721_140624_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  022F2F20 0138B8B0 01A4E4E0 03BB4B40 03337770 01556660 03FFEAA0 00001FF0 00001000 00001800 00001400
      00001400 00001E00 00001100 00001980 00001540 00001FE0 03000800 01400600 01E00500 01100780 01980440
      01980440 01540660 03FE0550 000107F0 00018400 00014600 0001E500 00008BC0 02006710 01005490 03807ED0
      03807ED0 004041B0 00606160 025051D0 01787930 01C445A0 03266770 02B554C0 03F7FF50 00060070 00050040
      00050040 00078060 02044050 01066070 01855040 0147F860 03E40450 00160670 001D0540 0209C3F0 01869100
      01869100 0145D980 01E73540 0114AFE0 039EF810 00518410 02794610 0145E510 03E71790 00149C50 010F6930
      010F6930 02C46ED0 01A659B0 01757560 03CFCFD0 00282830 003C3C20 02222230 03333320 00AAAAB0 00FFFFE0
      00FFFFE0 03400000 01700000 01C80000 012C0000 01BA0000 01670000 01D48000 013EC000 01A1A000 01717000
      01717000 01C9C800 00969600 006EEE80 005999C0 00755520 024FFFB0 03680060 00DC0050 02B20070 03EB0040
      03EB0040 021E8060 0111C050
     
