-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jan  8 14:06:58 2024 UTC
-- File 20230721_031931_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-21T03:19:34.000.000.000 to 2023-07-21T03:19:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230721_031931_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03117250 0099CB70 00D52EC0 025FDCD0 017032B0 01C82BE0 032C3E10 00BA2110 02E73190 0194A950 035EFDF0
      035EFDF0 02F18300 03894280 0126F1E0 03DAC480 0237A6C0 032C75A0 00BA4F70 00E768C0 0094DCA0 02DEB2F0
      02DEB2F0 03B1EB80 02691E40 035D9160 0279ACE0 02A2BD40 03F3E3E0 000A1210 020F1B10 01089690 038CDDD0
      038CDDD0 004AB330 006FEAA0 02581FF0 03741000 01670C00 00EA4500 009F6780 00D0D440 00B8BE60 02E4E150
      02E4E150 019691F0 015DD900 01F33580 010AAF40 018FF8E0 03A40240 033B01B0 02A68160 01F5C1D0 030F2130
      030F2130 0288B1A0 01CCE970 012A9DC0 01BFD320 03603AB0 02D027E0 02DC1A00 01D90B80 01358E40 01AF4960
      01AF4960 0378EDD0 00C49B30 00A6D6A0 02F5BDF0 038F6300 0248D280 036CBBC0 036D7310 026DE540 035B17E0
      035B17E0 00F69C10 028DD210 01CB3B10 032EA690 00B9F5D0 02E50F30 039788A0 005C4CF0 00393540 0212D7F0
      0212D7F0 031BBC00 02966200 03DD5300 0233FA80 032A07C0 02BF0420 01E08630 0110C520 0398A7B0 032A7A30
      032A7A30 035FA390 00F07250
     
