-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Jul  2 05:07:03 2023 UTC
-- File 20230624_122332_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-24T12:23:35.000.000.000 to 2023-06-24T12:23:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230624_122332_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03FA4100 02076180 0304D140 0286B9E0 01C5E510 03271790 00B49C50 01776930 02E66ED0 019559B0 015FF560
      015FF560 03F00FD0 00080830 000C0C20 020A0A30 030F0F20 008888B0 00CCCCE0 03555540 037FFFF0 02C00000
      02C00000 03A00000 02700000 03480000 02EC0000 039A0000 02570000 037C8000 02C2C000 01D1D000 009C9C00
      009C9C00 00D2D200 00BBBB00 00E66680 009555C0 00DFFF20 02B000B0 03E800E0 001C0090 021200D0 008D8050
      008D8050 0165A030 01D77020 033CC830 02A2AC20 01F3FA30 010A0720 038F04B0 024886E0 016CC590 03DAA750
      03DAA750 001BFA70 000B03A0 020E8270 0309C340 028D22E0 01CBB390 032E6A50 00B95F70 00E5F0C0 009708A0
      009708A0 02DC8CF0 01D96540 029AEBF0 03D79E00 023C5100 03227980 02B34540 03EAE7E0 001F9410 02105E10
      02105E10 01187110 03944990 022F36A0 009C56F0 00D27D80 00BB4340 00E6E2E0 02959390 01DF5A50 0330F770
      0330F770 02A88CC0 03FCCAA0 0002AFF0 0001FC00 00008100 0000C180 0000A140 0000F1E0 02008910 0100CD90
      0100CD90 0380AB50 0040FEF0
     
