-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Jun  1 01:25:34 2023 UTC
-- File 20230531_092728_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-31T09:27:31.000.000.000 to 2023-05-31T09:27:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230531_092728_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00F45160 028E79D0 01C94530 012DE7A0 03BB1470 01334F20 01D57450 019FE730 015014A0 03F81EF0 02041180
      02041180 03061940 028515E0 01C79F10 03245090 00B678D0 02ED44B0 03CDF370 01158560 039F47D0 0050E430
      0050E430 00789620 0244DD30 0366B3A0 00D5EA70 00BF1F40 00E090E0 0290D890 02EC5A60 02CD3BA0 01ABA670
      01ABA670 017E7540 01C14FE0 0321E810 00B11C10 02E99210 019D5B10 0353F690 00FA0DD0 01438590 03F123A0
      03F123A0 0009B270 000D6B40 000BDEE0 020E3190 01092950 038DBDF0 024B6300 036ED280 02D9BBC0 03DAB310
      03DAB310 021BF540 03160FE0 009D0810 02D38C10 01BA4A10 03676F10 00D4D890 02BEB4D0 01E1EEB0 011119E0
      011119E0 03CCCA80 011557E0 039FFC10 00500210 02780310 01440290 03E603D0 00150230 001F8320 021042B0
      021042B0 031863E0 024A2900 01B79EC0 016C51A0 03DA7970 023745C0 032CE720 00BA94B0 00E7DEE0 02943190
      02943190 01DE2950 03313DF0 0154D180 00FF5CA0 0280F2F0 03C08B80 0220CE40 0330A960 00A8FDD0 02FC8330
      02FC8330 0382C2A0 0043A3F0
     
