-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 31 23:48:12 2023 UTC
-- File 20230531_070121_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-31T07:01:24.000.000.000 to 2023-05-31T07:01:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230531_070121_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01491A60 03ED9750 001B5CF0 0016F280 001D8BC0 0209A710 0286BA40 03E2F3B0 0309C530 028D27A0 01CBB470
      01CBB470 012E6E40 01B95960 0365F5D0 00D70F30 00BC88A0 02E2CCF0 0393AA80 012D3FE0 03DDD000 02333800
      02333800 032AA400 02BFF600 03E00D00 02100B80 03180E40 02940960 01DE0DD0 03310B30 0354C750 007F5270
      007F5270 0040FB40 006086E0 0250C590 0178A750 03C4F4F0 02268E80 0335C9C0 02AF2D20 01F8BBB0 02827330
      02827330 03E1A550 001177F0 0019CC00 00152A00 001FBF00 00106080 001850C0 001478A0 021E44F0 03116680
      03116680 014CEAE0 03F54FC0 020FE820 01081C30 018C1220 034A1B30 02EF16A0 01989DF0 0154D300 01FEBA80
      01FEBA80 0101E7C0 02C08A10 02D06780 03B85440 02647E60 01564150 03FD61F0 0203D100 03023980 02832540
      02832540 03C2B7E0 0023EC10 03190D00 014AC5C0 01EFA720 031874B0 02944EE0 01DE6990 03315D50 00A9F3F0
      00A9F3F0 00FD0A00 00838F00 00C24880 0051B660 033CB6A0 00A2EDF0 00F39B00 008A5680 00CF7DC0 00A8C320
      00A8C320 02FCA2B0 0382F3E0
     
