-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 31 23:17:36 2023 UTC
-- File 20230531_054259_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-31T05:43:02.000.000.000 to 2023-05-31T05:43:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230531_054259_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000A0F00 000F0880 00088CC0 000CCAA0 020AAFF0 0187FC00 00A20100 007980C0 0222A050 0099F830 00D50420
      00D50420 02BF8630 03E04520 001067B0 00185460 02147E50 011E4170 019161C0 0159D120 01FA9CD0 0183E950
      0183E950 03421DF0 02E31300 03929A80 025BD7C0 03763C20 00CD2230 00ABB320 02FE6AB0 03815FE0 0220F800
      0220F800 01984200 01546300 01FE5280 01017BC0 0181C620 03412530 02E1B7A0 01916C70 0159DA40 01F53760
      01F53760 0387D660 02221EA0 013311F0 01AA9900 017FD580 01C03F40 012020E0 03B03090 006828D0 025C3CB0
      025C3CB0 037222E0 026599C0 03ABAA90 007E7FD0 02414030 0361E020 00D11030 00B99820 02E55430 0397FE20
      0397FE20 005C0130 007201A0 012580B0 02DBA070 03B67040 026D4860 015BEC50 03F61A70 020D1740 030B9CE0
      030B9CE0 008E5290 02C97BD0 01ADC630 02BD9290 02F1ADE0 01897B10 034DC690 00EB25D0 029EB730 03D1ECA0
      03D1ECA0 00391AF0 00259780 00375C40 002CF260 031D45A0 0049F3B0 006D0A60 025B8F50 017648F0 01CD6C80
      01CD6C80 012BDAC0 01BE37A0
     
