-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 31 07:16:53 2023 UTC
-- File 20230531_023828_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-31T02:38:31.000.000.000 to 2023-05-31T02:38:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230531_023828_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0214B4B0 031EEEE0 00919990 02D95550 01B5FFF0 016F0000 01D88000 009A6000 006BA800 002F3E00 0038A100
      0038A100 0024F180 00368940 002DCDE0 023B2B10 0126BE90 03B5E1D0 006F1130 005899A0 013A6AB0 02D3AFF0
      02D3AFF0 03BA7800 02674400 0354E600 02FE9500 0381DF80 02413040 0361A860 00D17C50 02B9C270 01F291A0
      01F291A0 0185ECB0 01471AE0 03E49790 0016DC50 021DB270 03136B40 029ADEE0 01D7B190 033C6950 00A25DF0
      00A25DF0 0079B980 0022B2A0 0233EBF0 032A1E00 02BF1100 03E09980 0210D540 0318BFE0 0094E010 02DE9010
      02DE9010 01B1D810 03B49A00 01376B80 01ACDE40 017AB160 03C7E9D0 00241D30 003613A0 022D1A70 033B9740
      033B9740 02A65CE0 01F57290 0387E5E0 02220B80 03330E40 02AA8960 01FFCDD0 03002B30 02803EA0 01C021F0
      01C021F0 01203100 01B02980 01683D40 02EE11F0 01CC8C80 012ACAC0 01BFAFA0 03607870 02D04440 03B86660
      03B86660 00645550 02567FF0 037D4000 02C3E000 01D10800 009CC600 00D2A500 00BBF780 00E60C40 00950A60
      00950A60 02DF8F50 01B048F0
     
