-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 31 06:44:48 2023 UTC
-- File 20230531_020820_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-31T02:08:23.000.000.000 to 2023-05-31T02:08:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230531_020820_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0153A5A0 03FA7770 02074CC0 0304EAA0 00869FF0 00C5D000 00539C00 003D2900 0011DEC0 020C98D0 00856A50
      00856A50 02C7DF70 03A430C0 027628A0 014D3CF0 01EBA280 011E73C0 01914A20 0359EF30 02F518A0 00C7CA70
      00C7CA70 005217A0 027B1C70 03469240 02E5DB60 019736D0 035CADB0 02F2FB60 018B86D0 034E45B0 02E96760
      02E96760 02CEEA60 02D4CFA0 01BEA870 0161FC40 01D10260 03398350 00A542F0 00F7E380 008C1240 00CA1B60
      00CA1B60 02AF16D0 00FC4ED0 014134D0 03E1AEB0 021179E0 0119C510 03952790 005FB450 02706E70 03485940
      03485940 02EC75E0 019A4F10 03ABB440 033F3730 02A0ACA0 01F0FAF0 01088780 018CC440 014AA660 03EFF550
      03EFF550 00180FF0 00140800 001E0C00 00088500 000663C0 00055220 0207FB30 030406A0 008605F0 00C50700
      00C50700 00A78480 00F446C0 008E65A0 02C95770 01D6FE60 039EC0A0 0051A0F0 00797080 0045C8C0 00672CA0
      00672CA0 0254BAF0 037EE780 02C19440 03A15E60 0071F150 012484F0 00DB6340 00B6D2E0 02EDBB90 019B6650
      019B6650 0356D570 02FDBFC0
     
