-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 31 04:22:38 2023 UTC
-- File 20230530_200141_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-30T20:01:44.000.000.000 to 2023-05-30T20:01:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230530_200141_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00B784C0 00EC46A0 029A65F0 03D75700 023CFC80 032282C0 02B3C3A0 01EA2270 011F3340 0190AAE0 0358FF90
      0358FF90 00F48050 01476030 02F26810 018B5C10 034EF210 00E98B10 029D4E90 01D3E9D0 033A1D30 02A713A0
      02A713A0 01F49A70 010ED740 02C4DE70 01D358A0 033AF4F0 02A78E80 03F449C0 020E6D20 01095BB0 018DF660
      018DF660 034B0D50 00EE8BF0 0099CE00 006A9480 002FEF60 023818D0 012414B0 01B61EE0 036D1190 00DB9950
      00DB9950 02B655F0 03ED7F00 021BC080 031620C0 034E9850 0074EA30 004E9F20 0269D0B0 035D38E0 00F3A490
      00F3A490 028A76D0 01CF4DB0 0128EB60 03BC9ED0 0062D1B0 0229DCB0 039E9970 0251D5C0 03793F20 00C5A0B0
      00C5A0B0 00A770E0 02F4C890 018EACD0 0349FAB0 02ED07E0 019B8410 03AB2300 013F5940 01A0F5E0 03708F10
      03708F10 00C8C890 02ACACD0 01FAFAB0 010787E0 03844410 00466610 02655510 02ABFFC0 03FF0010 00008010
      00008010 0200C010 0100A010 0380F010 00408810 0260CC10 0150AA10 03F8FF10 00048090 03036060 02416820
      02416820 0161DC30 01D13220
     
