-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 30 22:44:22 2023 UTC
-- File 20230530_071228_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-30T07:12:31.000.000.000 to 2023-05-30T07:12:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230530_071228_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02337AE0 012AC790 03BFA450 00607670 00504D40 00786BE0 02445E10 01667110 03D54990 003FED50 02201BF0
      02201BF0 03301600 01540E80 00FF04E0 02808690 01C0C5D0 0320A730 02B0F4A0 01E88EF0 011CC980 0192AD40
      0192AD40 015BFBE0 03F60610 02068280 0182E1E0 03439110 00E25990 02937550 01DACFF0 0137A800 01AC7C00
      01AC7C00 017A4200 01C76300 0124D280 00DB5DE0 035B7980 02F6C540 038DA7E0 004B7410 026ECE10 0159A910
      0159A910 03F57D90 000FC350 020822F0 030C3380 01451520 01F3CFD0 030A2830 028F3C20 01C8A230 012CF320
      012CF320 03BA8AB0 0267CFE0 01542810 03FE3C10 00012210 0300D980 01405AA0 03E077F0 02104C00 03186A00
      03186A00 02945F00 03DE7080 023148C0 0329ECA0 00BD1AF0 00E39780 00492E20 0136DC90 03ADB2D0 007B6BB0
      007B6BB0 0046DE60 0265B150 015769F0 01FCDD00 0102B380 0183EA40 01421F60 03F18860 0204A620 0106F530
      0106F530 01858FA0 03474870 02E4EC40 03969A60 005DD750 02733CF0 034AA280 02EFF3C0 03CC0510 021503C0
      021503C0 031F8220 00904330
     
