-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon May 29 00:01:15 2023 UTC
-- File 20230528_130958_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-28T13:10:01.000.000.000 to 2023-05-28T13:10:01.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230528_130958_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03920010 005B0010 02768010 014DC010 03EB2010 001EB010 0211E810 01191C10 03959210 005F5B10 0270F690
      0270F690 01488DD0 03ECCB30 021AAEA0 0117F9F0 019C0500 00A903C0 027EC110 0141A190 03E17150 0011C9F0
      0011C9F0 00192D00 0015BB80 001F6640 0010D560 0218BFD0 0114E030 02CF4810 02D47600 03BE4D00 02616B80
      02616B80 0351DE40 02F93160 0185A9D0 03477D30 02E4C3A0 0196A270 015DF340 02F98570 01C2A3E0 0323F210
      0323F210 00B20B10 02EB0E90 019E89D0 0351CD30 02F92BA0 0185BE70 01476140 01E4D1E0 038B5C80 01277960
      01277960 03B4C5D0 006EA730 0059F4A0 02750EF0 034F8980 02E84D40 039C6BE0 00525E10 027B7110 02A364C0
      02A364C0 03F96B50 0005DEF0 00073180 0004A940 0006FDE0 02058310 01074290 0384E3D0 00469230 0065DB20
      0065DB20 012B9B50 01DF2B70 0130BEC0 01A8E1A0 037C9170 02C2D9C0 03A3B520 00726FB0 004B5860 026EF450
      026EF450 01598E70 00FAA4A0 0143FB70 01E206C0 011305A0 039A8770 0257C4C0 037C26A0 00C235F0 00A32F00
      00A32F00 00F2B880 008BE4C0
     
