-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 28 23:57:22 2023 UTC
-- File 20230528_130240_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-28T13:02:43.000.000.000 to 2023-05-28T13:02:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230528_130240_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  020D4D30 030BEBA0 008E1E70 00C91140 00AD99E0 02FB5510 0186FF90 03458050 00E74070 004A7020 0137A410
      0137A410 03D63B00 011E9340 0191DAE0 03593790 00F5AC50 028F7A70 03C8C740 022CA4E0 013AF690 03A78DD0
      03A78DD0 00744B30 02273750 009A5670 00D77D40 00BCC3E0 02E2A210 0193F310 035A0A90 00F70FD0 028C8830
      028C8830 03CACC20 002FAA30 021C3F90 02891020 01CD9830 012B5420 03BEFE30 02618120 015141B0 01F9E160
      01F9E160 030511D0 00879930 00C455A0 01533FB0 02FD5030 0383F820 00420430 00630620 02528530 037BC7A0
      037BC7A0 00C62470 00A53640 00F7AD60 028C7BD0 00E52310 034BD940 02EE35E0 01992F10 0355B890 00FF64D0
      00FF64D0 0280D6B0 03C0BDE0 0020E310 02309290 0128DBD0 01DE5B10 0398BB40 0254E6E0 017E9590 03C1DF50
      03C1DF50 002130F0 0031A880 00297CC0 003DC2A0 022323F0 0332B200 0155F580 00FF87A0 02804470 03C06640
      03C06640 02205560 01307FD0 03A84030 027C6020 01425030 01E37820 0312C430 034DD310 02759D40 034F53E0
      034F53E0 00E8FA10 029C8710
     
