-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 28 02:25:55 2023 UTC
-- File 20230528_021615_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-28T02:16:18.000.000.000 to 2023-05-28T02:16:18.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230528_021615_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  015A5C00 01F77200 010CCB00 018AAE80 014FF9C0 01E80520 031C07B0 02920460 01DB0650 03368570 02ADC7C0
      02ADC7C0 03FB2420 0006B630 0005ED20 02071BB0 03049660 02436EA0 00B16CF0 00E9DA80 009D37C0 00D3AC20
      00D3AC20 02BA7A30 03E74720 0014E4B0 001E96E0 0211DD90 01193350 01CAD570 0097DFE0 02DC3010 01B22810
      01B22810 036B3C10 00DEA210 02B1F310 01E90A90 031D8FD0 00934830 00DAEC20 015BCD10 03FB15C0 02069F20
      02069F20 0105D0B0 018738E0 0344A490 00E6F6D0 02958DB0 03DF4B60 0030EED0 022899B0 039E6AB0 0328AFF0
      0328AFF0 02BCF800 03E28400 0213C600 031A2500 02973780 03DCAC40 0232FA60 012B8750 03BE44F0 0130B340
      0130B340 02D47570 03BE4FC0 02616820 0151DC30 01F93220 0305AB30 02877EA0 01C4C1F0 0126A100 01B5F180
      01B5F180 00B784A0 01762370 01CD32C0 012BABA0 03BE7E70 02614140 0351E1E0 00F91110 02859990 01C75550
      01C75550 0324FFF0 015B4000 00FB7000 0086C800 00C5AC00 00A77A00 00F4C700 008EA480 00C9F6C0 00AD0DA0
      00AD0DA0 02FB8B70 03864EC0
     
