-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 25 22:23:49 2023 UTC
-- File 20230525_093428_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-25T09:34:31.000.000.000 to 2023-05-25T09:34:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230525_093428_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  012C3C50 03BA2270 013399A0 03AA5570 027F7FC0 0340C020 00E0A030 0090F020 02D88830 03B4CC20 006EAA30
      006EAA30 0059FF20 013A8050 01D3E030 013A1020 03A71830 02749420 014EDE30 01E9B120 031D69B0 0293DD60
      0293DD60 01DA33D0 03372A30 03565F90 027EB820 0141E430 01E11620 03119D30 029953A0 01D5FA70 013F0740
      013F0740 01A084E0 0370C690 00C8A5D0 01567B90 03FEA320 0001F2B0 00010BE0 02018E10 01014910 0381ED90
      0381ED90 00411B50 026196F0 03515D80 02F9F340 03C28570 0111E3E0 03991210 00559B10 027F5690 0140FDD0
      0140FDD0 03E08330 0210C2A0 0118A3F0 0194F200 015E8B00 00F8E740 02424A70 03636F40 02D2D8E0 01BBB490
      01BBB490 03666ED0 00D559B0 00BFF560 02E00FD0 01900830 01580C20 01FA0510 038383C0 02424220 01636330
      01636330 01D2D2A0 033BBBF0 02A66600 03F55500 020FFF80 03080040 028C0060 02E50020 00CBC010 02AE2010
      02AE2010 01F93010 0305A810 00877C10 02C4C210 01A6A310 0375F290 00CF0BD0 02A88E30 03FE6490 0200AB60
      0200AB60 0100FED0 038081B0
     
