-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 25 00:01:09 2023 UTC
-- File 20230524_115249_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-24T11:52:52.000.000.000 to 2023-05-24T11:52:52.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230524_115249_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E59530 028BAFD0 00E73C10 034A5100 02EF7980 0398C540 0254A7E0 017EF410 03C18E10 00214910 0231ED90
      0231ED90 01291B50 03BD96F0 0131AEC0 02D4BCD0 01BEE2B0 016193E0 03D15A10 0039F710 02250C90 01378AD0
      01378AD0 03AC4FB0 027A6860 01475C50 01F27930 0285A2D0 01C773B0 0124CA60 03B6AF50 006DF8F0 005B0480
      005B0480 007686C0 004DC5A0 026B2770 035EB4C0 0378F750 00624670 00536540 007AD7E0 0247BC10 01646210
      01646210 03D65310 003D7A90 0223C7D0 01322430 01AB3620 01BF5690 03B07EE0 00684190 025C6150 017251F0
      017251F0 01CB7900 012EC580 01B9A740 016574E0 03D7CE90 003C29D0 01111E90 03CCC8E0 002AAC90 023FFAD0
      023FFAD0 012007B0 01B00460 03680650 00DC0570 00B207C0 00EB0420 029E8630 03E8E290 020E49E0 01096D10
      01096D10 038DDB90 004B3650 026EAD70 0359FBC0 02F50620 018F8530 014847A0 03EC6470 010D2B20 01C5DF50
      01C5DF50 032730F0 02B4A880 03EEFCC0 021982A0 011543F0 019FE200 01501300 01F81A80 010417C0 02C30E10
      02C30E10 02D14480 03B9E6C0
     
