-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 24 22:46:41 2023 UTC
-- File 20230524_102204_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-24T10:22:07.000.000.000 to 2023-05-24T10:22:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230524_102204_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02BC8AF0 03E2CF80 0213A840 031A7C60 024BA120 00B738D0 01765250 01E6BDB0 028AF1B0 03CF8960 00284DD0
      00284DD0 023C6B30 03225EA0 00B371F0 00EAC900 009FAD80 00D07B40 00B846E0 037232C0 036595D0 00D75F30
      00D75F30 00BCF0A0 02E288F0 0393CC80 025A2AC0 03773FA0 00CCA070 00AAF040 00FF8860 03402620 00701A90
      00701A90 024817D0 016C1C30 01DA1220 03371B30 02AC96A0 01FADDF0 0107B300 01846A80 01465FC0 02F2B810
      02F2B810 02C5F200 03A70B00 02748E80 034EC9C0 02E9AD20 019D7BB0 0153C660 03FA2550 000737F0 0004AC00
      0004AC00 00037D00 000161C0 0001D120 020139B0 0301A560 008177D0 02C1CC30 03A12A20 0071BF30 004960A0
      004960A0 026DD0F0 01AD9C40 02BDA930 03E37DA0 0012C370 001BA2C0 001673A0 021D4A70 0313EF40 029A18E0
      029A18E0 01D71490 033C9ED0 005168D0 013CEE50 03A29970 0273D5C0 034A3F20 00EF20B0 0098B0E0 02D4E890
      02D4E890 01BE9CD0 0361D2B0 02D13BE0 02DCD300 01D95D40 0135F3E0 03AF0A10 00788F10 0244C890 0166ACD0
      0166ACD0 03D5FAB0 023F07E0
     
