-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 12 22:29:57 2023 UTC
-- File 20230512_082931_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-12T08:29:34.000.000.000 to 2023-05-12T08:29:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230512_082931_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02723870 034B2440 02EEB660 0199ED50 01AA8DF0 00BFE580 00700BA0 02480E70 036C0940 02DA0DE0 01B70B10
      01B70B10 036C8E90 00DAC9D0 02B7AD30 03EC7BA0 001A4670 000BB2A0 010735F0 0184AF00 0146F880 01E584C0
      01E584C0 011746A0 039CE5F0 02529700 037BDC80 02C632C0 03A52BA0 003BDF30 02131850 011A9470 0197DE40
      0197DE40 015C3160 03F229D0 000B3D30 000EA3A0 0209F270 030D0B40 028B8EE0 02E724C0 03CA5B50 002F76F0
      002F76F0 0038CD80 0024AB40 0036FEE0 022D8190 013B4150 03A6E1F0 02759100 034F5980 01747AA0 01E723F0
      01E723F0 0114B200 019EEB00 01519E80 01F951C0 0105F920 038705B0 02448760 0166C4D0 03D5A6B0 031FBAF0
      031FBAF0 014833C0 01EC2A20 031A3F30 029720A0 01DCB0F0 0132E880 01AB9CC0 017E52A0 03C17BF0 0221C600
      0221C600 01989280 00AA6DE0 02FF5B10 0180F690 03408DD0 00E0CB30 0090AEA0 02D8F9F0 03B48500 026EC780
      026EC780 0359A440 037ABB30 0363F350 00D20AF0 00BB0F80 00E68840 0095CC60 02DF2A50 01B0BF70 0168E0C0
      0168E0C0 01DC90A0 0332D8F0
     
