-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 12 02:02:26 2023 UTC
-- File 20230512_013050_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-12T01:30:53.000.000.000 to 2023-05-12T01:30:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230512_013050_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  013CCC40 01A2AA60 0373FF50 00CA00F0 00AF0080 00F880C0 0084C0A0 02C6A0F0 03A5F080 027708C0 034C8CA0
      034C8CA0 00EACAF0 009FAF80 00D07840 025C2230 03B91990 00659550 02575FF0 037CF000 02C28800 03A3CC00
      03A3CC00 02722A00 034B3F00 02EEA080 0399F0C0 032A8450 005FE330 007012A0 02481BF0 036C1600 02DA1D00
      02DA1D00 03B71380 026C9A40 035AD760 00F7BCD0 028C62B0 03E529F0 010BDE80 018E31C0 01492920 03EDBDB0
      03EDBDB0 021B6360 0116D2D0 039DBBB0 02536660 017AD550 03C7BFF0 01123000 00CD9400 00AB5E00 00FEF100
      00FEF100 00818980 00C14D40 00A1EBE0 02F11E10 01899110 034D5990 00EBF550 014F07F0 00F44200 008E6300
      008E6300 00C95280 00ADFBC0 00FB0620 02868530 03C5C7A0 00272470 0034B640 002EED60 031CCDE0 02495580
      02495580 036DFF40 02DB00E0 01B68090 036DC0D0 00DB20B0 00B6B0E0 02EDE890 019B1CD0 035692B0 037EEDF0
      037EEDF0 0160CD80 01D0AB40 0138FEE0 03A48190 0076C150 024DA1F0 036B7100 02DEC980 03B1AD40 02697BE0
      02697BE0 02AEE300 01FCC940
     
