-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 11 02:26:27 2023 UTC
-- File 20230511_020747_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-05-11T02:07:50.000.000.000 to 2023-05-11T02:07:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230511_020747_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00FA0CA0 02870AF0 03C48F80 0226C840 0335AC60 00AF7A50 02F8C770 0384A4C0 0246F6A0 00B2C6F0 0075D2C0
      0075D2C0 02279DD0 01345330 01AE7AA0 037947F0 02C5E400 03A71600 02749D00 034ED380 02E9BA40 039D6760
      039D6760 0229EA60 029E8FA0 01D1C870 01392C40 01A5BA60 03776750 00CCD4F0 00AABE80 00FFE1C0 00801120
      00801120 02C019B0 03D00AB0 031C07F0 02920400 03DB0600 02368500 032DC780 02BB2440 03E6B660 0015ED50
      0015ED50 021F1BF0 03109600 014C6E80 00F52CE0 028FBA90 01C867D0 032C5430 02BA7E20 01E74130 0114E1A0
      0114E1A0 039E9170 0251D9C0 03793520 0062D7D0 0129DE10 03BD3110 0063A990 02527D50 017B43F0 01C6E200
      01C6E200 01259300 01B75A80 016CF7C0 01DA8C20 019BE510 03AB0BC0 027E8E20 0141C930 01E12DA0 0311BB70
      0311BB70 029966C0 03D5D5A0 003F3F70 0020A0C0 0030F0A0 01144470 00CF3320 02A8AAB0 03FCFFE0 00028010
      00028010 0203C010 01022010 03833010 0042A810 0263FC10 01520210 03FD8180 0101A0A0 038170F0 0241C880
      0241C880 03612CC0 02D1BAA0
     
