-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 29 23:54:35 2023 UTC
-- File 20230429_220215_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-29T22:02:18.000.000.000 to 2023-04-29T22:02:18.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230429_220215_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  018C1E80 014A11C0 01EF1920 031895B0 0294DF60 01DEB0D0 0331E8B0 02A91CE0 01FD9290 03035BD0 0082F630
      0082F630 00C38D20 02A24BB0 03F36E60 000AD950 020FB5F0 03086F00 01462C40 02F29D30 038BD3A0 004E3A70
      004E3A70 00692740 005DB4E0 02736E90 014AD9D0 03EFB530 02186FA0 01145870 00CF3A20 01545390 03FE7A50
      03FE7A50 00014770 0001E4C0 000116A0 02019DF0 03015300 0281FA80 03C107C0 02218420 0098A310 036A7940
      036A7940 02DF45E0 01B0E710 03689490 00DCDED0 02B2B1B0 03EBE960 001E1DD0 02111330 03199AA0 004AABF0
      004AABF0 0037FF00 002C0080 003A00C0 002700A0 023480F0 032EC080 02B9A0C0 03E570A0 0017C8F0 001C2C80
      001C2C80 00091D60 0306C9E0 0085AD10 02C77B90 01A4C650 0376A570 02CDF7C0 03AB0C20 007E8A30 0041CF20
      0041CF20 026128B0 03A8DE70 013E58A0 03A174F0 0271CE80 034929C0 02EDBD20 019B63B0 0156D260 03FDBB50
      03FDBB50 000366F0 0002D580 0001DFA0 01009830 0180D420 0340BE30 02E0E120 019091B0 0158D960 03F4B5D0
      03F4B5D0 000EEF30 000998A0
     
