-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 27 02:44:03 2023 UTC
-- File 20230427_022449_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-27T02:24:52.000.000.000 to 2023-04-27T02:24:52.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230427_022449_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0197B3E0 035C6A10 00F25F10 028B7090 01CEC8D0 0329ACB0 02BD7AE0 01E3C790 03122450 004D9B30 0235AB50
      0235AB50 0097BF70 006E3060 02592850 0175BC70 01CF6240 0128D360 03BCBAD0 0062E7B0 00539460 027A5E50
      027A5E50 01477170 00F264E0 0345AB40 02E77EE0 0194C190 035EA150 00F1F1F0 00890900 00CD8D80 00AB4B40
      00AB4B40 00FEEEE0 02819990 02E0AAA0 00C87FF0 00AC4000 00FA6000 00875000 00C4F800 00A68400 00F5C600
      00F5C600 008F2500 00C8B780 00ACEC40 027D4D30 03A1F5D0 00710F30 004988A0 026D4CF0 035BEA80 02F61FC0
      02F61FC0 038D1020 004B9830 006E5420 02597E30 03BAE090 0233C860 012A2C50 03BF3A70 0260A740 0350F4E0
      0350F4E0 00F88E90 0284C9D0 01C6AD30 0125FBA0 03B70670 013642A0 01D6B1F0 013DE900 01A31D80 01729340
      01729340 01CBDAE0 032E3790 00B92C50 02E5BA70 03976740 025CD4E0 02B95F40 03F2F870 020B8440 030E4660
      030E4660 00896550 02CDD7F0 03AB3C00 027EA200 0341F300 02E10A80 03918FC0 032CA410 025D7B00 0373C680
      0373C680 02CA25C0 03AF3720
     
