-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 25 21:10:41 2023 UTC
-- File 20230425_040020_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-25T04:00:23.000.000.000 to 2023-04-25T04:00:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230425_040020_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  025A88F0 0377CC80 02CC2AC0 03AA3FA0 007F2070 0040B040 0060E860 02509C50 0178D270 01C4BB40 0126E6E0
      0126E6E0 03B59590 0237AFA0 012C7870 01BA4440 01676660 03D4D550 003EBFF0 0021E000 00311000 00299800
      00299800 003D5400 0011FF00 000C8040 000AC060 020FA050 01087070 018C4840 014A6C60 03EF5A50 0018F770
      0018F770 00148CC0 001ECAA0 0108D7F0 00C65E00 00A57100 00F7C980 008C2D40 00CA3BE0 02AF2610 01F8B510
      01F8B510 0304EF90 00869850 02C5D470 01D39F20 019D2850 0353BC70 02FA6240 03875360 0044FAD0 026687B0
      026687B0 0355C460 00FF2650 0280B570 03C0EFC0 03104C10 024C3500 036A2F80 02DF3840 03B0A460 0068F650
      0068F650 025C8D70 0372CBC0 02CBAE20 01AE7930 017945A0 01E2F3B0 0289C530 03CD27A0 002BB470 003E6E40
      003E6E40 00215960 0231F5D0 01290F30 01BD88A0 03634CF0 02D2EA80 01DDCFE0 03999400 02555E00 037FF100
      037FF100 02C00980 03A00D40 02700BE0 01480E10 03EC0910 001A0D90 02170B50 008E4770 0064B260 0256EB50
      0256EB50 017D9EF0 01C35180
     
