-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 23 21:37:43 2023 UTC
-- File 20230423_055835_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-23T05:58:38.000.000.000 to 2023-04-23T05:58:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230423_055835_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  001FB280 00106BC0 00185E20 010A3890 038F24D0 0048B6B0 006CEDE0 025A9B10 0177D690 03CC3DD0 002A2330
      002A2330 003F32A0 0220ABF0 01987F00 00AA2040 00FF3060 0280A850 01C0FC70 01208240 01B0C360 0368A2D0
      0368A2D0 00DCF3B0 00B28A60 02EBCF50 00CF1470 00544F20 027E68B0 03415CE0 00E1F290 02910BD0 01D98E30
      01D98E30 01354920 03AFEDB0 02781B60 014416D0 01F30ED0 018544D0 0347E6B0 02E415E0 01961F10 035D1090
      035D1090 00F398D0 028A54B0 03CF7EE0 0028C190 023CA150 009178F0 006CE240 005A9360 0277DAD0 014C37B0
      014C37B0 01EA2C60 031F3A50 0090A770 00D8F4C0 00B48EA0 02EEC9F0 01CCD680 00955EE0 02DFF190 01B00950
      01B00950 03680DF0 02DC0B00 03B20E80 026B09C0 035E8D20 00F1CBB0 00892E60 0366DCA0 006AD970 005FB5C0
      005FB5C0 00706F20 024858B0 036C74E0 00DA4E90 02B769D0 01ECDD30 011AB3A0 0397EA70 012E0FA0 01DC8430
      01DC8430 0132C620 03ABA530 027E77A0 01414C70 01E1EA40 01111F60 039990D0 005558B0 007FF4E0 03200740
      03200740 03580270 02F40340
     
