-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 22 21:18:43 2023 UTC
-- File 20230422_092453_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-22T09:24:56.000.000.000 to 2023-04-22T09:24:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230422_092453_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03249A80 02B6D7C0 03EDBC20 001B6230 0016D320 010EDD50 01C4D9F0 00935A80 00DAF7C0 00B78C20 02EC4A30
      02EC4A30 039A6F20 005758B0 007CF4E0 02428E90 0163C9D0 03D22D30 031D9DD0 0049A990 026D7D50 015BC3F0
      015BC3F0 01F62200 010D3300 018BAA80 014E7FC0 01E94020 031DE030 02931020 00ED4C10 034DF500 02EB0F80
      02EB0F80 039E8840 0251CC60 01792A50 03C5BF70 022760C0 0334D0A0 00AEB8F0 00F9E480 00428B60 0331E760
      0331E760 00A914D0 02FD9EB0 038351E0 0042F910 02638590 01524750 03FB64F0 0206D680 0305BDC0 0343B190
      0343B190 027134A0 0149AEF0 01ED7980 011BC540 019627E0 035D3410 00F3AE10 028A7910 01CF4590 0328E750
      0328E750 005E4A70 0038B7A0 0224EC70 03369A40 02ADD760 01FB3CD0 0306A2B0 0285F3E0 01C70A10 03248F10
      03248F10 00B6C890 0376D660 0266DEA0 0155B1F0 01FF6900 0100DD80 0180B340 0140EAE0 03E09F90 0010D050
      0010D050 0218B870 0314E440 034F4B30 03747750 00CE4CF0 00A96A80 00FDDFC0 00833020 02C2A830 03A3FC20
      03A3FC20 00720230 004B0320
     
