-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 22 21:15:32 2023 UTC
-- File 20230422_074326_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-22T07:43:29.000.000.000 to 2023-04-22T07:43:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230422_074326_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024B44A0 016EE6F0 01D99580 01355F40 01AFF0E0 03780890 00C40CD0 01530550 01FD43F0 0081F100 006084C0
      006084C0 02286350 013C52F0 01A27B80 01734640 01CAE560 032F97D0 00B85C30 00E47220 02964B30 03DD6EA0
      03DD6EA0 0019ECF0 000A8D40 000FCBE0 02082E10 010C3910 038A2590 004F3750 0268ACF0 035CFA80 02F287C0
      02F287C0 038BC420 00271310 031A4D40 02976BE0 01DCDE10 0332B110 00ABE990 02FE1D50 018113F0 01419A00
      01419A00 01E15700 0111FC80 00CC8160 035560E0 00FFD090 028038D0 01C024B0 012036E0 03B02D90 00683B50
      00683B50 025C26F0 03723580 02CB2F40 03D75C70 011E7920 039145B0 0259E760 017514D0 03CF9EB0 022851E0
      022851E0 013C7910 03A24590 00736750 024AD4F0 01B7DF40 02B61870 03ED1440 021B9E60 01165150 039D79F0
      039D79F0 0253C500 037A2780 02C73440 03A4AE60 0076F950 0126C2F0 00DAD1C0 00B7B920 02EC65B0 039A5760
      039A5760 00577CD0 027CC2B0 0342A3E0 00E3F210 02920B10 01DB0E90 039B44E0 022B7340 033ECAE0 00A1AF90
      00A1AF90 02F17850 0189C470
     
